======================== README.TXT =================================
ARTICLE INFORMATION

   Journal:
   Review of Scientific Instruments

   All Authors:
   Arne Schwettmann, Jonathon Sedlacek and James P. Shaffer

   Title:
   FPGA-based locking circuit for external cavity diode laser
   frequency stabilization

DEPOSIT INFORMATION

   Description:
   This archive contains the source codes and binary files of our FPGA-based
   diode laser locking circuit (LockBox) and the corresponding Windows user
   interface (LockBoxControlWin). LockBox is written in VHDL and is intended
   to be uploaded to a Digilent Nexys 2 FPGA board. The compiler used was
   Xilinx Webpack ISE 10.1. LockBoxControlWin is written in C++ and is intended
   to be run on Windows computers. It makes use of Borland VCL and Digilent
   DPCUtil libraries. The compiler used was Borland Developer Studio 2006. Two
   pre-compiled LockBox FPGA bitfiles, ready to be uploaded to the FPGA, and a
   pre-compiled LockBoxControlWin Windows executable are also included.

   Total No. of Files:
   31

   File Names:
   (\)
   "README.TXT"
      - this file
   (\LockBox\)
   "lockbox.vhdl"
      - top level source code, main LockBox FPGA program
   "lowPass16bit.vhd"
      - source code for low pass filter module
   "highpass16bit.vhd"
      - source code for high pass filter module
   "pidPiezo.vhd"
      - source code for Piezo PID module
   "pidCurrent.vhd"
      - source code for Current PID module
   "triangleGenerator16bit.vhd"
      - source code for triangle wave generator module
   "display.vhd"
      - source code for on-board seven segment display utilization
   "dpimref_mod.vhd"
      - modified Digilent reference implementation for USB data exchange
   "AD1RefComp_mod.vhd"
      - modified Digilent reference implementation for PmodAD1 input board
   "DA2RefComp_mod.vhd"
      - modified Digilent reference implementation for PmodDA2 output board
   "dpimref.vhd"
      - Digilent reference implementation for USB data exchange, original
   "AD1RefComp.vhd"
      - Digilent reference implementation for PmodAD1 input board, original
   "DA2RefComp.vhd"
      - Digilent reference implementation for PmodDA2 output board, original
   "Nexys2-1200kLockbox.ucf"
      - universal constraints file, port to pin mapping for Nexys2 board
   "LockBox.ise"
      - Webpack ISE 10.1 project file for LockBox project
   "lockbox_CCLKClock.bit"
      - compiled LockBox circuit bitfile, ready to be uploaded to FPGA
   "lockbox_JTAGClock.bit"
      - compiled LockBox circuit bitfile, ready to be uploaded to onboard PROM
   (\LockBoxControlWin\)
   "LockBoxControlWinMain.cpp"
      - top level source code, main LockBoxControlWin C++ program
   "LockBoxControlWinMain.dfm"
      - form definition, contains VCL user interface layout such as button positions
   "LockBoxControlWinMain.h"
      - declarations for main program source
   "LockBoxControlWin.cpp"
      - IDE managed program entry point
   "LockBoxControlWin.res"
      - IDE managed program resources
   "dpcutilOMF.lib"
      - interface to DPCUTIL.DLL, converted to OMF format
   "gendefs.h"
      - global definitions for DPCDEMO Program
   "dpcutil.h"
      - interface declarations for DPCUTIL.DLL
   "dpcdefs.h"
      - type and constant definitions for DPCUTIL.DLL
   "dpcutil.lib"
      - interface to DPCUTIL.DLL
   "dpcutil.dll"
      - Digilent PC Utility library for USB communication with FPGA board
   "LockBoxControlWin.bdsproj"
      - Borland Developer Studio project file for LockBoxControlWin project
   "LockBoxControlWin.exe"
      - compiled LockBoxControlWin executable

   File Types:
   *.bdsproj:  Borland Developer Studio project, use to re-construct the project tree
   *.bit:   binary bitfile, compiled FPGA circuit design ready to be uploaded into the FPGA
   *.cpp:   C++ source code, C++ function definitions
   *.dfm:   Borland VCL form definitions, user interface layout
   *.dll:   Windows dynamic link library, pre-compiled functions to be linked into a Windows program
   *.exe:   Windows executable file
   *.h:  C++ header, declarations of C++ functions
   *.ise:   Webpack ISE compiler project, use to re-construct project tree
   *.lib:   C++ import library, used to link a program to a dynamic link library
   *.txt:   Ascii text
   *.ucf:   Universal constraints file, mapping from ports in the program to pins on the FPGA
   *.vhd,*.vhdl:  VHDL source code, can be synthesized into bitfiles with a VHDL compiler

   Special Instructions:
   The free program "Digilent Adept Suite" version 1.1.0 needs to be installed
   for the LockBoxControlWin user interface to function. Adept is the program
   used to upload bitfiles to Digilent FPGA boards, and it includes the
   dpcutil.dll communication library as well as the required USB drivers.
   These files are needed by LockBoxControlWin to communicate with the FPGA
   board through the USB bus.

   On first startup of LockBoxControlWin, the FPGA board should be selected.
   This is done by clicking on the "Select Device..." option in the "Edit"
   menu. The "DPCOMM Device Manager" window should now open. After a click on
   "Enumerate," the FPGA board name should appear in the "Connnected Devices"
   list. A click on the board name should make its serial number appear. Now,
   type an alias into the alias field and click "Add Dvc," and then "Save."
   This procedure has to be done only once per board.

   Two pre-compiled FPGA bitfiles are provided. Both contain the same LockBox
   circuit implementation, but each uses a different startup clock signal. The
   file "lockbox_JTAGClock.bit" is generated using the JTAG clock as startup
   clock. This file is intended to be uploaded to the FPGA directly and will
   be erased from memory as soon as the FPGA board is switched off. The file
   "lockbox_CCLKClock.bit" is generated using the CCLK clock as startup clock.
   This file is intended to be uploaded to the onboard Flash ROM (PROM). Once
   on the PROM, the program will be uploaded to the FPGA automatically each
   time the FPGA board is switched on. After the initial upload of
   "lockbox_CCLKClock.bit" into the PROM, it is necessary to power-cycle the
   FPGA board once to transfer the program from the PROM onto the FPGA.

   After uploading the program to the FPGA, it is recommended to perform a
   reset to refresh all the parameters of the locking circuit. This is
   accomplished by either clicking on the "reset" button in the user interface
   "debug" panel, or by pushing the push button on the board labeled "BTN2."

   To check that LockBoxControlWin communicates with the FPGA board, click
   "Reset" on the debug panel, uncheck "Lock" on the lock panel, check "Scan
   enable" on the Scan panel and look for a triangle scanning waveform coming
   out of Analog output 1.

   Mouse-over hints can be enabled from the Help menu. If enabled, a help
   box is displayed when hovering the mouse over a GUI element.

   The easiest and fastest way to change parameters is to use the cursor keys:
   activate an edit field with the mouse, and then use cursor left right to
   select the digit and cursor up/down to change the parameter by that order of
   magnitude. Parameters can also be changed by the mouse, by first positioning
   the cursor over the digit one wants to change, and then clicking the
   plus/minus buttons to the left of the respective edit field.

   Download Links:
   The Digilent Adept suite 1.1.0 can be downloaded from Digilent at the URL
   http://www.digilentinc.com/Products/Detail.cfm?Prod=ADEPT (retrieved August
   2011).
   The VHDL compiler Xilinx Webpack ISE 10.1 is freely available from Xilinx
   at the URL http://www.xilinx.com/support/download/index.htm (retrieved
   August 2011).
   A free 30-day trial version of the Borland C++ compiler is available from
   Embarcadero at the URL https://downloads.embarcadero.com/free/c_builder
   (retrieved August 2011).

   Copyright Authorization:
   The Digilent reference implementation source codes are reproduced
   with kind permission from Digilent Inc.

   Contact Information:
   James P. Shaffer
   The University of Oklahoma
   Homer L. Dodge Department of Physics and Astronomy
   440 W. Brooks St.
   Norman, OK 73019
   e-mail: shaffer@nhn.ou.edu
   phone: 405-325-3961 x 36143
   fax: 405-325-7557

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